Pre-treatment compositions for copper plating and aqueous acidic plating baths for electrolytic deposition of copper are used for manufacturing printed circuit boards and IC substrates where fine structures like trenches, through holes (TH), blind micro vias (BMV) and pillar bumps need to be filled or build up with copper. Another application of such electrolytic deposition of copper is filling of recessed structures such as through silicon vias (TSV) or forming redistribution layers (RDL) and pillar bumps in and on semiconducting substrates.
Organic leveller additives present in a pre-treatment composition and/or in an acidic copper plating bath are adsorbed onto the substrate surface and influence the copper deposition thereon.
The patent application EP 1 249 861 A2 discloses a pre-treatment composition for copper deposition onto semiconducting substrates. The pre-treatment composition comprises an organic sulfide or disulfide additive and optionally a leveller additive such as phenazine azo dyes.
The patent application JP 2001-152387 A discloses a process for copper plating wherein the substrate is (i) immersed in a pre-treatment composition containing an additive which is selected from the group of chloride ions, surfactants and nitrogen-containing organic compounds, (ii) rinsed and (iii) copper deposited from a plating bath which is free of surfactants.
The patent document U.S. Pat. No. 2,758,076 discloses an acidic copper plating bath comprising 5-amino-2-mercapto-benzimidazole. Copper deposits derived from such a plating bath are very bright, fine-grained, soft and good leveled.
The patent application EP 1 069 211 A2 discloses an acidic copper plating bath which comprises a low molecular leveller additive selected from N-containing five membered and N-containing six membered heterocyclic molecules such as 5-phenyl-1H-1,2,4-triazole-3-thiol and 4-amino-5-(4′-pyridyl)-4H-1,2,4-triazole-3-thiol.
However, such leveller additives in a pre-treatment composition and/or in acidic copper plating baths are not suitable to fulfill the current and future requirements in manufacture of advanced printed circuit boards, IC substrates and metallization of semiconducting substrates. BMVs in printed circuit boards and IC substrates need to be filled with copper completely and not only conformally. Typical requirements for BMV filling are for example: obtaining a completely filled BMV while depositing no more than 10 to 15 μm of copper onto the neighbouring planar substrate areas and at the same time creating a dimple on the outer surface of the filled BMV of no more than 0 to 5 μm.
In metallization of semiconducting wafers, TSV filling must lead to a complete and void-free filling with copper while creating no more than ⅕ of via diameter of overplated copper onto the neighbouring planar areas.
During use of an acidic copper plating bath leveller additives tend to form break-down products which reduce the life time of such plating baths.
Furthermore, inclusion of leveller additives or of break-down products thereof into the copper deposit during copper deposition has a negative impact on mechanical properties such as ductility of the deposited copper.
Utilization of leveller additives in pre-treatment compositions still does not solve such problems. Especially the levelling and TSV filling properties of such leveller additives used in pre-treatment compositions is not sufficient to meet the requirements in state of the art manufacture of printed circuit boards, IC substrates and semiconductor metallisation.